A team from the Department of Electrical and Computer Engineering at University of California, Davis has designed a microchip containing 1,000 independent programmable processors, 621 million transistors and has the ability to compute 1.78 trillion instructions per second.
"To the best of our knowledge, it is the world's first 1,000-processor chip and it is the highest clock-rate processor ever designed in a university," commented Bevan Baas, professor of electrical and computer engineering and led designer of the chip, said in a statement.
The chip, dubbed as "KiloCore", was presented at the 2016 Symposium on VLSI Technology and Circuits in Honolulu on June 16.
According to a press release from UC Davis, previous multi-core processors run programs using the so-called Single-Instruction-Multiple-Data approach. This approach breaks an application up into many small pieces then making each piece run in parallel in different processors, enabling throughput with lower energy use. Also, other multiple-processor chips that have been designed recently do not exceed more than 300 processors.
On the other hand, each of the processor cores of KiloCore can run small programs independently of the others, making it possible for each processor to shut itself down when not in use to save energy.
KiloCore is undoubtedly the most energy-efficient multi-core processor ever reported. The cores operate at an average maximum clock frequency of 1.78 GHz. It can also execute 115 billion instructions per second while dissipating only 0.7 Watts, which is low enough to be powered by AA battery.
The KiloCore chip was fabricated by IBM using their 32 nm CMOS technology and can execute instructions 100 times better than a laptop processor.
At present, there are already some applications developed for the chip including wireless coding/decoding, video processing, encryption, and others involving large amounts of parallel data such as scientific data applications and datacenter record processing. The UC Davis team has also completed a compiler and automatic program mapping tools for use in programming the chip.